WEKO3
アイテム
{"_buckets": {"deposit": "39b19c6a-f8f5-478e-9dd4-d2f95fc18451"}, "_deposit": {"created_by": 3, "id": "14347", "owners": [3], "pid": {"revision_id": 0, "type": "depid", "value": "14347"}, "status": "published"}, "_oai": {"id": "oai:sucra.repo.nii.ac.jp:00014347", "sets": ["242"]}, "author_link": ["18709"], "item_119_biblio_info_8": {"attribute_name": "書誌情報", "attribute_value_mlt": [{"bibliographicIssueDates": {"bibliographicIssueDate": "2001", "bibliographicIssueDateType": "Issued"}, "bibliographicIssueNumber": "11", "bibliographicPageEnd": "2622", "bibliographicPageStart": "2614", "bibliographicVolumeNumber": "E84-A", "bibliographic_titles": [{"bibliographic_title": "IEICE transactions on fundamentals of electronics, communications and computer sciences"}]}]}, "item_119_date_31": {"attribute_name": "作成日", "attribute_value_mlt": [{"subitem_date_issued_datetime": "2008-01-30", "subitem_date_issued_type": "Created"}]}, "item_119_description_19": {"attribute_name": "抄録", "attribute_value_mlt": [{"subitem_description": "In this paper, a LSI design for video encoder and decoder for H.263+ video compression is presented. LSI operates under clock frequency of 27 MHz to compress QCIF (176144 pixels) at the frame rate of 30 frame per second. The core size is 4.6 4.6 mm2 in a 0.35 ?m process. The architecture is based on bus connected heterogeneous dedicated modules, named as System-MSPA architecture. It employs the fast and small-chip-area dedicated modules in lower level and controls them by employing the slow and flexible programmable device and an external DRAM. Design results in success to achieve real time encoder in quite compact size without losing flexibility and expand ability. Real time emulation and easy test capability with external PC is also implemented.", "subitem_description_type": "Abstract"}]}, "item_119_description_21": {"attribute_name": "注記", "attribute_value_mlt": [{"subitem_description": "copyright(c)2001 \nIEICE許諾番号:08RB0009 \nhttp://search.ieice.org/index.html", "subitem_description_type": "Other"}]}, "item_119_description_29": {"attribute_name": "資源タイプ", "attribute_value_mlt": [{"subitem_description": "text", "subitem_description_type": "Other"}]}, "item_119_description_30": {"attribute_name": "フォーマット", "attribute_value_mlt": [{"subitem_description": "application/pdf", "subitem_description_type": "Other"}]}, "item_119_publisher_11": {"attribute_name": "出版者名", "attribute_value_mlt": [{"subitem_publisher": "社団法人電子情報通信学会"}]}, "item_119_relation_7": {"attribute_name": "著者 外部リンク", "attribute_value_mlt": [{"subitem_relation_name": [{"subitem_relation_name_text": "http://s-read.saitama-u.ac.jp/researchers/pages/researcher/TfwxTeoe"}], "subitem_relation_type_id": {"subitem_relation_type_id_text": "http://s-read.saitama-u.ac.jp/researchers/pages/researcher/TfwxTeoe", "subitem_relation_type_select": "URI"}}]}, "item_119_source_id_14": {"attribute_name": "ISSN", "attribute_value_mlt": [{"subitem_source_identifier": "09168508", "subitem_source_identifier_type": "ISSN"}]}, "item_119_text_27": {"attribute_name": "版", "attribute_value_mlt": [{"subitem_text_value": "[出版社版]"}]}, "item_119_text_3": {"attribute_name": "著者 ローマ字", "attribute_value_mlt": [{"subitem_text_value": "ITO, Kazuhito"}, {"subitem_text_value": "HONSAWEK, Chawalit"}, {"subitem_text_value": "OHTSUKA, Tomohiko"}, {"subitem_text_value": "ADIONO, Trio"}, {"subitem_text_value": "LI, Dongju"}, {"subitem_text_value": "ISSHIKI, Tsuyoshi"}, {"subitem_text_value": "KUNIEDA, Hiroaki"}]}, "item_119_text_32": {"attribute_name": "アイテムID", "attribute_value_mlt": [{"subitem_text_value": "A1003003"}]}, "item_119_text_35": {"attribute_name": "公開日(XooNIps)", "attribute_value_mlt": [{"subitem_text_value": "Jan 30, 2008 09:00:00"}]}, "item_119_text_36": {"attribute_name": "最終更新日(XooNIps)", "attribute_value_mlt": [{"subitem_text_value": "Sep 1, 2009 10:32:03"}]}, "item_119_text_37": {"attribute_name": "更新履歴(XooNIps)", "attribute_value_mlt": [{"subitem_text_value": "Sep 1, 2009 フリーキーワード, 著者 を変更"}, {"subitem_text_value": "Mar 17, 2009 フリーキーワード, キーワード を変更"}, {"subitem_text_value": "Jan 22, 2009 フリーキーワード, インデックス, キーワード を変更"}, {"subitem_text_value": "Oct 10, 2008 フリーキーワード, インデックス, キーワード を変更"}, {"subitem_text_value": "Feb 27, 2008 フリーキーワード, インデックス, キーワード を変更"}, {"subitem_text_value": "Jan 30, 2008 フリーキーワード, インデックス, キーワード を変更"}, {"subitem_text_value": "Jan 30, 2008 コメント, ID, フリーキーワード, インデックス, 版, キーワード を変更"}]}, "item_119_text_38": {"attribute_name": "登録者(XooNIps)", "attribute_value_mlt": [{"subitem_text_value": "sucra_jim4"}]}, "item_119_text_39": {"attribute_name": "閲覧数(XooNIps)", "attribute_value_mlt": [{"subitem_text_value": "1507"}]}, "item_119_text_4": {"attribute_name": "著者 所属", "attribute_value_mlt": [{"subitem_text_value": "埼玉大学情報機構情報メディア基盤センター学術情報処理研究開発部門"}]}, "item_119_text_40": {"attribute_name": "ダウンロード数(XooNIps)", "attribute_value_mlt": [{"subitem_text_value": "1217"}]}, "item_119_text_41": {"attribute_name": "XooNIps_インデックス", "attribute_value_mlt": [{"subitem_text_value": "sucra_jim4|Public/主題別/工学/電気電子工学/電子デバイス・電子機器|Public/ジャンル別/学術雑誌論文(国内)/電子情報通信学会|Public/埼玉大学/機構・センター/情報メディア基盤センター"}]}, "item_119_text_42": {"attribute_name": "XooNIps_ITEM_KEY", "attribute_value_mlt": [{"subitem_text_value": "1678"}]}, "item_119_text_5": {"attribute_name": "著者 所属(別言語)", "attribute_value_mlt": [{"subitem_text_value": "The Information Processing Center, Saitama University"}]}, "item_119_text_9": {"attribute_name": "年月次", "attribute_value_mlt": [{"subitem_text_value": "2001-11"}]}, "item_119_version_type_28": {"attribute_name": "著者版フラグ", "attribute_value_mlt": [{"subitem_version_resource": "http://purl.org/coar/version/c_970fb48d4fbd8a85", "subitem_version_type": "VoR"}]}, "item_creator": {"attribute_name": "著者", "attribute_type": "creator", "attribute_value_mlt": [{"creatorNames": [{"creatorName": "伊藤, 和人"}, {"creatorName": "イトウ, カズヒト", "creatorNameLang": "ja-Kana"}], "nameIdentifiers": [{"nameIdentifier": "18709", "nameIdentifierScheme": "WEKO"}, {"nameIdentifier": "TfwxTeoe", "nameIdentifierScheme": "研究者総覧", "nameIdentifierURI": "http://s-read.saitama-u.ac.jp/researchers/pages/researcher/TfwxTeoe"}]}]}, "item_files": {"attribute_name": "ファイル情報", "attribute_type": "file", "attribute_value_mlt": [{"accessrole": "open_date", "date": [{"dateType": "Available", "dateValue": "2018-01-24"}], "displaytype": "detail", "download_preview_message": "", "file_order": 0, "filename": "A1003003.pdf", "filesize": [{"value": "1.1 MB"}], "format": "application/pdf", "future_date_message": "", "is_thumbnail": false, "licensetype": "license_free", "mimetype": "application/pdf", "size": 1100000.0, "url": {"label": "A1003003.pdf", "url": "https://sucra.repo.nii.ac.jp/record/14347/files/A1003003.pdf"}, "version_id": "11962deb-e5d6-4aee-9c8d-210eb1b4c5fb"}]}, "item_keyword": {"attribute_name": "キーワード", "attribute_value_mlt": [{"subitem_subject": "system-MSPA", "subitem_subject_scheme": "Other"}, {"subitem_subject": "LSI design", "subitem_subject_scheme": "Other"}, {"subitem_subject": "videotelephony applications", "subitem_subject_scheme": "Other"}, {"subitem_subject": "H.263+ ITU standard", "subitem_subject_scheme": "Other"}]}, "item_language": {"attribute_name": "言語", "attribute_value_mlt": [{"subitem_language": "eng"}]}, "item_resource_type": {"attribute_name": "資源タイプ", "attribute_value_mlt": [{"resourcetype": "journal article", "resourceuri": "http://purl.org/coar/resource_type/c_6501"}]}, "item_title": "Systm-MSPA Design of H.263+ Video Encoder/Decoder LSI for Videotelephony Applications(Special Section on VLSI Design and CAD Algorithms)", "item_titles": {"attribute_name": "タイトル", "attribute_value_mlt": [{"subitem_title": "Systm-MSPA Design of H.263+ Video Encoder/Decoder LSI for Videotelephony Applications(Special Section on VLSI Design and CAD Algorithms)"}]}, "item_type_id": "119", "owner": "3", "path": ["242"], "permalink_uri": "https://sucra.repo.nii.ac.jp/records/14347", "pubdate": {"attribute_name": "公開日", "attribute_value": "2008-01-30"}, "publish_date": "2008-01-30", "publish_status": "0", "recid": "14347", "relation": {}, "relation_version_is_last": true, "title": ["Systm-MSPA Design of H.263+ Video Encoder/Decoder LSI for Videotelephony Applications(Special Section on VLSI Design and CAD Algorithms)"], "weko_shared_id": -1}
Systm-MSPA Design of H.263+ Video Encoder/Decoder LSI for Videotelephony Applications(Special Section on VLSI Design and CAD Algorithms)
https://sucra.repo.nii.ac.jp/records/14347
https://sucra.repo.nii.ac.jp/records/143478f60a829-0d5c-4c03-8f0e-011d50c07949
名前 / ファイル | ライセンス | アクション |
---|---|---|
A1003003.pdf (1.1 MB)
|
|
Item type | 学術雑誌論文 / Journal Article(1) | |||||
---|---|---|---|---|---|---|
公開日 | 2008-01-30 | |||||
タイトル | ||||||
タイトル | Systm-MSPA Design of H.263+ Video Encoder/Decoder LSI for Videotelephony Applications(Special Section on VLSI Design and CAD Algorithms) | |||||
言語 | ||||||
言語 | eng | |||||
キーワード | ||||||
主題Scheme | Other | |||||
主題 | system-MSPA | |||||
キーワード | ||||||
主題Scheme | Other | |||||
主題 | LSI design | |||||
キーワード | ||||||
主題Scheme | Other | |||||
主題 | videotelephony applications | |||||
キーワード | ||||||
主題Scheme | Other | |||||
主題 | H.263+ ITU standard | |||||
資源タイプ | ||||||
資源タイプ識別子 | http://purl.org/coar/resource_type/c_6501 | |||||
資源タイプ | journal article | |||||
著者 |
伊藤, 和人
× 伊藤, 和人 |
|||||
著者 ローマ字 | ||||||
ITO, Kazuhito | ||||||
著者 ローマ字 | ||||||
HONSAWEK, Chawalit | ||||||
著者 ローマ字 | ||||||
OHTSUKA, Tomohiko | ||||||
著者 ローマ字 | ||||||
ADIONO, Trio | ||||||
著者 ローマ字 | ||||||
LI, Dongju | ||||||
著者 ローマ字 | ||||||
ISSHIKI, Tsuyoshi | ||||||
著者 ローマ字 | ||||||
KUNIEDA, Hiroaki | ||||||
著者 所属 | ||||||
埼玉大学情報機構情報メディア基盤センター学術情報処理研究開発部門 | ||||||
著者 所属(別言語) | ||||||
The Information Processing Center, Saitama University | ||||||
書誌情報 |
IEICE transactions on fundamentals of electronics, communications and computer sciences 巻 E84-A, 号 11, p. 2614-2622, 発行日 2001 |
|||||
年月次 | ||||||
2001-11 | ||||||
出版者名 | ||||||
出版者 | 社団法人電子情報通信学会 | |||||
ISSN | ||||||
収録物識別子タイプ | ISSN | |||||
収録物識別子 | 09168508 | |||||
抄録 | ||||||
内容記述タイプ | Abstract | |||||
内容記述 | In this paper, a LSI design for video encoder and decoder for H.263+ video compression is presented. LSI operates under clock frequency of 27 MHz to compress QCIF (176144 pixels) at the frame rate of 30 frame per second. The core size is 4.6 4.6 mm2 in a 0.35 ?m process. The architecture is based on bus connected heterogeneous dedicated modules, named as System-MSPA architecture. It employs the fast and small-chip-area dedicated modules in lower level and controls them by employing the slow and flexible programmable device and an external DRAM. Design results in success to achieve real time encoder in quite compact size without losing flexibility and expand ability. Real time emulation and easy test capability with external PC is also implemented. | |||||
注記 | ||||||
内容記述タイプ | Other | |||||
内容記述 | copyright(c)2001 IEICE許諾番号:08RB0009 http://search.ieice.org/index.html |
|||||
版 | ||||||
[出版社版] | ||||||
著者版フラグ | ||||||
出版タイプ | VoR | |||||
出版タイプResource | http://purl.org/coar/version/c_970fb48d4fbd8a85 | |||||
資源タイプ | ||||||
内容記述タイプ | Other | |||||
内容記述 | text | |||||
フォーマット | ||||||
内容記述タイプ | Other | |||||
内容記述 | application/pdf | |||||
作成日 | ||||||
日付 | 2008-01-30 | |||||
日付タイプ | Created | |||||
アイテムID | ||||||
A1003003 |