{"created":"2023-05-15T15:26:22.653689+00:00","id":14347,"links":{},"metadata":{"_buckets":{"deposit":"39b19c6a-f8f5-478e-9dd4-d2f95fc18451"},"_deposit":{"created_by":3,"id":"14347","owners":[3],"pid":{"revision_id":0,"type":"depid","value":"14347"},"status":"published"},"_oai":{"id":"oai:sucra.repo.nii.ac.jp:00014347","sets":["95:242"]},"author_link":["18709"],"item_119_biblio_info_8":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicIssueDates":{"bibliographicIssueDate":"2001","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"11","bibliographicPageEnd":"2622","bibliographicPageStart":"2614","bibliographicVolumeNumber":"E84-A","bibliographic_titles":[{"bibliographic_title":"IEICE transactions on fundamentals of electronics, communications and computer sciences"}]}]},"item_119_date_31":{"attribute_name":"作成日","attribute_value_mlt":[{"subitem_date_issued_datetime":"2008-01-30","subitem_date_issued_type":"Created"}]},"item_119_description_19":{"attribute_name":"抄録","attribute_value_mlt":[{"subitem_description":"In this paper, a LSI design for video encoder and decoder for H.263+ video compression is presented. LSI operates under clock frequency of 27 MHz to compress QCIF (176144 pixels) at the frame rate of 30 frame per second. The core size is 4.6  4.6 mm2 in a 0.35 ?m process. The architecture is based on bus connected heterogeneous dedicated modules, named as System-MSPA architecture. It employs the fast and small-chip-area dedicated modules in lower level and controls them by employing the slow and flexible programmable device and an external DRAM. Design results in success to achieve real time encoder in quite compact size without losing flexibility and expand ability. Real time emulation and easy test capability with external PC is also implemented.","subitem_description_type":"Abstract"}]},"item_119_description_21":{"attribute_name":"注記","attribute_value_mlt":[{"subitem_description":"copyright(c)2001 \nIEICE許諾番号：08RB0009　\nhttp://search.ieice.org/index.html","subitem_description_type":"Other"}]},"item_119_description_29":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"subitem_description":"text","subitem_description_type":"Other"}]},"item_119_description_30":{"attribute_name":"フォーマット","attribute_value_mlt":[{"subitem_description":"application/pdf","subitem_description_type":"Other"}]},"item_119_publisher_11":{"attribute_name":"出版者名","attribute_value_mlt":[{"subitem_publisher":"社団法人電子情報通信学会"}]},"item_119_source_id_14":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"09168508","subitem_source_identifier_type":"ISSN"}]},"item_119_text_27":{"attribute_name":"版","attribute_value_mlt":[{"subitem_text_value":"[出版社版]"}]},"item_119_text_3":{"attribute_name":"著者 ローマ字","attribute_value_mlt":[{"subitem_text_value":"ITO, Kazuhito"},{"subitem_text_value":"HONSAWEK, Chawalit"},{"subitem_text_value":"OHTSUKA, Tomohiko"},{"subitem_text_value":"ADIONO, Trio"},{"subitem_text_value":"LI, Dongju"},{"subitem_text_value":"ISSHIKI, Tsuyoshi"},{"subitem_text_value":"KUNIEDA, Hiroaki"}]},"item_119_text_32":{"attribute_name":"アイテムID","attribute_value_mlt":[{"subitem_text_value":"A1003003"}]},"item_119_text_4":{"attribute_name":"著者 所属","attribute_value_mlt":[{"subitem_text_value":"埼玉大学情報機構情報メディア基盤センター学術情報処理研究開発部門"}]},"item_119_text_5":{"attribute_name":"著者 所属(別言語)","attribute_value_mlt":[{"subitem_text_value":"The Information Processing Center, Saitama University"}]},"item_119_text_9":{"attribute_name":"年月次","attribute_value_mlt":[{"subitem_text_value":"2001-11"}]},"item_119_version_type_28":{"attribute_name":"著者版フラグ","attribute_value_mlt":[{"subitem_version_resource":"http://purl.org/coar/version/c_970fb48d4fbd8a85","subitem_version_type":"VoR"}]},"item_creator":{"attribute_name":"著者","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"伊藤, 和人"},{"creatorName":"イトウ, カズヒト","creatorNameLang":"ja-Kana"}],"nameIdentifiers":[{},{}]}]},"item_files":{"attribute_name":"ファイル情報","attribute_type":"file","attribute_value_mlt":[{"accessrole":"open_date","date":[{"dateType":"Available","dateValue":"2018-01-24"}],"displaytype":"detail","filename":"A1003003.pdf","filesize":[{"value":"1.1 MB"}],"format":"application/pdf","licensetype":"license_note","mimetype":"application/pdf","url":{"label":"A1003003.pdf","url":"https://sucra.repo.nii.ac.jp/record/14347/files/A1003003.pdf"},"version_id":"11962deb-e5d6-4aee-9c8d-210eb1b4c5fb"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"system-MSPA","subitem_subject_scheme":"Other"},{"subitem_subject":"LSI design","subitem_subject_scheme":"Other"},{"subitem_subject":"videotelephony applications","subitem_subject_scheme":"Other"},{"subitem_subject":"H.263+ ITU standard","subitem_subject_scheme":"Other"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"eng"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourcetype":"journal article","resourceuri":"http://purl.org/coar/resource_type/c_6501"}]},"item_title":"Systm-MSPA Design of H.263+ Video Encoder/Decoder LSI for Videotelephony Applications(Special Section on VLSI Design and CAD Algorithms)","item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"Systm-MSPA Design of H.263+ Video Encoder/Decoder LSI for Videotelephony Applications(Special Section on VLSI Design and CAD Algorithms)"}]},"item_type_id":"119","owner":"3","path":["242"],"pubdate":{"attribute_name":"公開日","attribute_value":"2008-01-30"},"publish_date":"2008-01-30","publish_status":"0","recid":"14347","relation_version_is_last":true,"title":["Systm-MSPA Design of H.263+ Video Encoder/Decoder LSI for Videotelephony Applications(Special Section on VLSI Design and CAD Algorithms)"],"weko_creator_id":"3","weko_shared_id":-1},"updated":"2023-05-16T12:01:54.642334+00:00"}